AMD has finally begun shipping processors on the 45-nm node with the launch of "Shanghai," its first 45-nm server processor, on Thursday.
The good news? AMD's production schedule was advanced enough that it was able to pull Shanghai in by roughly three months. The bad news, unfortunately, is that rival Intel will launch its second-generation 45-nm chip, "Nehalem," in just a few days' time.
AMD's Shanghai launch is significant for two reasons: first, as evidence that AMD has pulled its manufacturing technology back on track after its severe missteps with the prior "Barcelona" microprocessor, which contained show-stopping bugs.
In addition, Shanghai may also offer some clues as to the performance of "Deneb," the desktop processor based on the 45-nm technology, which is due to launch during the first quarter of 2008. In August, AMD executives acknowledged that their company was behind Intel on desktop processor performance.
All of the announced versions of Shanghai contain four cores. Nine versions of Shanghai will be manufactured at launch, with five in the 2-way Opteron 2000 series, and four in the 8-way Opteron 8000 series. A version designed for four-socket systems will also be manufactured, according to Burke Banda, product marketing manager for the server and workstation division of AMD. Prices for the two-socket versions will range from $377 to $989 at launch, with the 8000 series priced between $1,165 and $2,149.
The Opteron 2000 line will include 2.3-, 2.4-, 2.5-., 2.6-, and 2.7-GHz speed grades. The Opteron 8000 line will forego the slowest 2.3-GHz version.
As always, shrinking the die size of a microprocessor allows either greater speed or lower power. In Shanghai's case, AMD also chose to take some of the die space it gained through the process shrink and apply it to additional level-3 cache capabilities, tripling the L3 cache to 6 Mbytes. As expected, the additional cache adds faster access to memory.
But AMD's original plans also called for the company to manufacture the chip up to just 2.5-GHz, leaving the faster versions to a future higher-power version. Due to efficiencies in AMD's production line, Banda said, AMD was able to manufacture the entire line in a so-called "standard power" version, which maintains the thermal design power found in the Barcelona.
So-called "HE" or high-efficiency, low-power versions will be released in the first quarter of 2009, Banda said. Shanghai includes a technology AMD calls "Smart Fetch," which allows the cores to enter a low-power halt state with no impact on performance, trimming the CPU power by up to 21 percent.
Unfortunately for AMD, Intel's consistent execution within its manufacturing operations has left the company struggling to keep up, part of the justification for its "asset smart" strategy AMD announced in October. The 45-nm technology node transition has been so important to AMD that the company began talking about it a little less than two years ago, describing techniques such as immersive lithography and advanced strained-silicon techniques.
But AMD was able to score one procedural victory by reorganizing its test and validation teams under a single manager, Banda said. The reorg cost the team a 30-day delay, but the efficiencies in working together pulled in the final production run by 120 days.
With Nehalem on the horizon, AMD executives positioned the shift from the near-identical Barcelona to Shanghai processors as one that would allow a consistent design path for its customers. "We're continuing to move the business forward with a consistency of products," Banda said. "'Risk adverse' is the key term we hear from them."
While customers will most likely develop Shanghai-specific products, the design of the processor allows customers to quickly shift Barcelona machines to the new architecture, Banda said.
For enterprise customers, AMD touted features designed for virtualization, which can eliminate physical servers in favor of operating systems simply running on the CPUs themselves. Rapid virtualization indexing will improve application performance, while tagged TLBs aids switching back and forth between virtual machines. Banda said the Shanghai also supports shifting live virtual machines across different generations of Opteron processors, including a live migration from an Opteron to an Intel machine, and back.
Shanghai customers recently invited to a small conference to speak said they've been impressed with both AMD's reaction to its Barcelona debacle, as well as the performance of the new Shanghai chip.
"Sometimes you really find out about your partner when they're in a corner," said John Lee, vice president for advanced technology solutions at Appro, which has deployed AMD-based supercomputers at national laboratories including the Lawrence Livermore National Laboratory as well as Los Alamos. "I think everyone will agree that Barcelona didn't go as smoothly it should. For us, we had a number of high-profile design wins at about that time; we referred to it as the 'perfect storm'. But AMD stepped up; they were with us every step of the way."
Philip Pokorny, the chief architect at Penguin Computing, said his company was frustrated because the Barcelona bug actually did not affect many of his customers.
From a performance perspective, AMD seems to have Shanghai well in hand. AMD claimed the lead in several two-socket benchmarks, including SPECint_rate2006, where AMD's own tests show a roughly 5 percent improvement over a faster Intel Xeon "Harpertown" processor; a 14 percent lead in SPECjbb2005; and a 34 percent and 91 percent increase in the SPECfp_rate2006 and STREAM benchmarks, respectively.
"Intel made some inroads; there's no doubt of that," Appro's Lee said. "But in four-socket machines AMD has no peer right now."
The accompanying 5690 chipset also includes HyperTransport 3, a sharp jump from the HyperTransport 1 standard used in the Barcelona chipsets. That means that chip-to-chip throughput also rockets from 5.6 Gbits/s to a theoretical peak of 17.6 Gbits/s. Banda said. But the bottlenecks aren't chip-to-chip connections, but I/O, he added.
In 2009, AMD will add a six-core processor, "Istanbul," also designed around the Socket F connector Shanghai uses. Of note will be reduced memory access latency and remote power management, Banda said. Both Shanghai and Istanbul will be part of the "Fiorano" platform, which adds SR5690 and SP5100 chipsets from Nvidia and Broadcom.
